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Operating Systems

25 chapters

1Intro to OS & Kernel Architecture2Process Concept & Lifecycle3System Calls & Interrupts4Process Management & PCB5Inter-Process Communication (IPC)6CPU Scheduling (FCFS, SJF, RR)7Threads (User vs Kernel Level)8Process Synchronization9Critical Section Problem10Producer-Consumer Problem11Dining Philosophers Problem12Deadlock Conditions & Prevention13Banker's Algorithm (Avoidance)14Memory Management & Paging15Memory Allocation (First Fit, Best Fit)16Paging and Segmentation17Translation Lookaside Buffer (TLB)18Virtual Memory & Demand Paging19Page Replacement Algorithms20Thrashing21File Systems & Directory Structure22File Allocation Methods23Disk Scheduling Algorithms24I/O Systems & DMA25OS Protection & Security
SubjectsOperating Systems

Process Synchronization

Updated 2026-05-04
3 min read

Process Synchronization

In a multiprogramming environment, multiple processes can execute concurrently and share the same memory or data. When processes are allowed to execute concurrently, they may be interrupted at any point, leaving shared data in an inconsistent state.

Process Synchronization is the coordination of execution of multiple processes in a multi-processor system to ensure that they access shared resources in a mutually exclusive manner.

1. The Race Condition

A Race Condition occurs when several processes access and manipulate the same data concurrently, and the outcome of the execution depends on the particular order in which the access takes place.

Example Scenario

Imagine two threads, Thread A and Thread B, both trying to increment a shared variable counter = 5.

The code counter++ is actually executed by the CPU in three distinct low-level machine instructions:

  1. Load counter from memory into a CPU register.
  2. Increment the register by 1.
  3. Store the register back to memory.

If Thread A executes Step 1 and Step 2, its register contains 6. But before it can execute Step 3, a context switch happens! Now Thread B executes Steps 1, 2, and 3. It reads 5, increments to 6, and writes 6 to memory. Finally, Thread A resumes and executes Step 3, writing its register (6) to memory.

Even though two threads incremented the counter, the final value is 6 instead of 7. The data has been corrupted because the execution was interleaved.

2. Synchronization Hardware

To solve the race condition, we need to ensure that the three steps of counter++ are executed atomically (as one uninterruptible unit).

Modern processors provide special hardware instructions to help with synchronization:

  • Test-and-Set: An instruction that reads a memory value and writes a new value simultaneously.
  • Compare-and-Swap (CAS): An instruction that compares the contents of a memory location with a given value and, only if they are the same, modifies the contents of that memory location to a new given value.

Because these are hardware-level instructions, they are guaranteed to be atomic. No context switch can interrupt a Test-and-Set instruction halfway through.

3. Semaphores

A Semaphore is an integer variable that, apart from initialization, is accessed only through two standard atomic operations: wait() and signal() (originally termed P() and V() by Edsger Dijkstra).

How it works

  • wait(S): If the semaphore $S \le 0$, the process blocks and waits. If $S > 0$, it decrements $S$ and continues execution.
  • signal(S): Increments the semaphore $S$. If any processes are blocked waiting for $S$, one is woken up.

Types of Semaphores

  1. Binary Semaphore (Mutex Lock): The value can only be 0 or 1. Used to provide mutual exclusion. A process calls wait() before entering its critical section, and signal() after leaving.
  2. Counting Semaphore: The value can range over an unrestricted domain. Used to control access to a given resource consisting of a finite number of instances (like 5 available printers).

Warning: Incorrect use of semaphores can result in timing errors that are notoriously difficult to detect, since these errors happen only if particular execution sequences take place, and these sequences are rare.



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